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TESTING STRATIGIES




Function verification approaches can be divided into two categories. Bottom-up and flat approaches.



Bottom-Up



Bottom-up approach can be done at 4 levels.
1)Unit (Module-level) Level
2)Sub-ASIC (Functional Blocks) Level
3)ASIC Level
4)System Level



Unit Level



In unit level verification, a module is verified in its own test environment to prove that the logic, control, and data paths are functionally correct. The goal of module level verification is to ensure that the component/unit being tested conforms to its specifications and is ready to be integrated with other subcomponents of the product. In unit level verification good coverage percentage is expected.



Sub-Asic Level



In sub-asic level ,the goal is to ensure that the interfaces among the units are correct & the units work together to execute the functionality correctly. Sometimes this level can be skipped.


Asic Level



Asic level verification is the process of verifying the ASIC to see that it meets its specified requirements. ASIC level verification must concentrate on ensuring the use and interaction of ASIC rather than on checking the details of its implementations .


System Level






Flat



In this ,verification approaches by combining interface models and transaction streams to test the Complete ASIC.





Index
Introduction
Linear Tb
File Io Tb
State Machine Based Tb
Task Based Tb
Self Checking Testbench
Verification Flow
Clock Generator
Simulation
Incremental Compilation
Store And Restore
Event Cycle Simulation
Time Scale And Precision
Stimulus Generation
System Function Random A Myth
Race Condition
Checker
Task And Function
Process Control
Disableing The Block
Watchdog
Compilation N Simulation Switchs
Debugging
About Code Coverage
Testing Stratigies
File Handling
Verilog Semaphore
Finding Testsenarious
Handling Testcase Files
Terimination
Error Injuction
Register Verification
Parameterised Macros
White Gray Black Box
Regression
Tips

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