|HOME |ABOUT |ARTICLES |ACK |FEEDBACK |TOC |LINKS |BLOG |JOBS |


Tutorials



UVM SEQUENCE 5


Sequencer Registration Macros




Sequence Registration Macros does the following
1) Implements get_type_name method.
2) Implements create() method.
3) Registers with the factory.
4) Implements the static get_type() method.
5) Implements the virtual get_object_type() method.
6) Registers the sequence type with the sequencer type.
7) Defines p_sequencer variable. p_sequencer is a handle to its sequencer.
8) Implements m_set_p_sequencer() method.

If there are no local variables, then use following macro


`uvm_sequence_utils(TYPE_NAME,SQR_TYPE_NAME)



If there are local variables in sequence, then use macro


`uvm_sequence_utils_begin(TYPE_NAME,SQR_TYPE_NAME)
`uvm_field_* macro invocations here
`uvm_sequence_utils_end



Macros `uvm_field_* are used for define utility methods.
These `uvm_field_* macros are discussed in
UVM_TRANSACTION


Example to demonstrate the usage of the above macros:



class seq_mul extends uvm_sequence #(instruction);

rand integer num_inst ;
instruction req;

constraint num_c { num_inst inside { 3,5,7 }; };

`uvm_sequence_utils_begin(seq_mul,instruction_sequencer)
`uvm_field_int(num_inst, UVM_ALL_ON)
`uvm_sequence_utils_end

function new(string name="seq_mul");
super.new(name);
endfunction


virtual task body();
uvm_report_info(get_full_name(),
$psprintf("Num of transactions %d",num_inst),UVM_LOW);
repeat(num_inst) begin
`uvm_do_with(req, { inst == MUL; });
end
endtask

endclass

(S)Download the example


uvm_sequence_9.tar
Browse the code in uvm_sequence_9.tar


(S)Command to sun the simulation


VCS Users : make vcs
Questa Users: make questa



(S)Log

UVM_INFO @ 0: reporter [RNTST] Running test ...
UVM_INFO @ 0: reporter [sequencer.seq_mul] Num of transactions 5
0: Driving Instruction MUL
10: Driving Instruction MUL
20: Driving Instruction MUL
30: Driving Instruction MUL
40: Driving Instruction MUL


Setting Sequence Members:



set_config_* can be used only for the components not for the sequences.
By using configuration you can change the variables inside components only not in sequences.

But there is a workaround to this problem.

Sequence has handle name called p_sequencer which is pointing the Sequencer on which it is running.
Sequencer is a component , so get_config_* methods are implemented for it.
So from the sequence, using the sequencer get_config_* methods, sequence members can be updated if the variable is configured.

When using set_config_* , path to the variable should be sequencer name, as we are using the sequencer get_config_* method.

Following method demonstrates how this can be done:


(S)Sequence:


1) num_inst is a integer variables which can be updated.
2) In the body method, call the get_config_int() method to get the integer value if num_inst is configured from testcase.


class seq_mul extends uvm_sequence #(instruction);

integer num_inst = 4;
instruction req;

`uvm_sequence_utils_begin(seq_mul,instruction_sequencer)
`uvm_field_int(num_inst, UVM_ALL_ON)
`uvm_sequence_utils_end

function new(string name="seq_mul");
super.new(name);
endfunction


virtual task body();

void'(p_sequencer.get_config_int("num_inst",num_inst));

uvm_report_info(get_full_name(),
$psprintf("Num of transactions %d",num_inst),UVM_LOW);
repeat(num_inst) begin
`uvm_do_with(req, { inst == MUL; });
end
endtask

endclass


(S)Testcase:


From the testcase, using the set_config_int() method, configure the num_inst to 3.
The instance path argument should be the sequencer path name.



module test;


instruction_sequencer sequencer;
instruction_driver driver;

initial begin
set_config_string("sequencer", "default_sequence", "seq_mul");
set_config_int("sequencer", "num_inst",3);
sequencer = new("sequencer", null);
sequencer.build();
driver = new("driver", null);
driver.build();

driver.seq_item_port.connect(sequencer.seq_item_export);
sequencer.print();
fork
begin
run_test();
sequencer.start_default_sequence();
end
#3000 global_stop_request();
join
end

endmodule


(S)Download the example


uvm_sequence_10.tar
Browse the code in uvm_sequence_10.tar


(S)Command to sun the simulation


VCS Users : make vcs
Questa Users: make questa



(S)Log

UVM_INFO @ 0: reporter [RNTST] Running test ...
UVM_INFO @ 0: reporter [sequencer.seq_mul] Num of transactions 3
0: Driving Instruction MUL
10: Driving Instruction MUL
20: Driving Instruction MUL



From the above log we can see that seq_mul.num_inst value is 3.




Index
Introduction
Uvm Testbench
Uvm Reporting
Uvm Transaction
Uvm Configuration
Uvm Factory
Uvm Sequence 1
Uvm Sequence 2
Uvm Sequence 3
Uvm Sequence 4
Uvm Sequence 5
Uvm Sequence 6
Uvm Tlm 1
Uvm Tlm 2
Uvm Callback

Report a Bug or Comment on This section - Your input is what keeps Testbench.in improving with time!





<< PREVIOUS PAGE

TOP

NEXT PAGE >>

copyright © 2007-2017 :: all rights reserved www.testbench.in::Disclaimer