It is the most complex type of code coverage, because it works on the behavior of the design. Using Finite state machine coverage, all bugs related to finite state machine design can be found. In this coverage we look for how many times states are visited, transited and how many sequence are covered in a Finite state machine.
State Coverage:
It gives the coverage of no. of states visited over the total no. of states. Suppose you have N number of states and state machines transecting is in between only N-2 states then coverage will give alert that some states are uncovered. It is advised that all the states must be covered.
Transition Coverage:
It will count the no. of transition from one state to another and it will compare it with other total no. of transition. Total no. of transition is nothing but all possible no. of transition which is present in the finite state machine. Possible transition = no. of states * no. of inputs.
EXAMPLE of FSM: module fsm (clk, reset, in);
input clk, reset, in;
reg [1:0] state;
always @(posedge clk orposedge reset)
begin if (reset) state <= s1;
elsecase (state)
s1:if (in == 1'b1) state <= s2;
else state <= s3;
s2: state <= s4;
s3: state <= s4;
s4: state <= s1;
endcase end endmodule
module testbench();
reg clk,reset,in;
fsm dut(clk,reset,in);
initial forever #5 clk = ~clk;
initial begin clk =0;in = 0;
#2 reset = 0;#2 reset = 1;
#21 reset = 0;#9 in = 0;
#9 in = 1;#10 $finish;
end
endmodule
FSM coverage report for the above example: // state coverage results s1 | Covered s2 | Not Covered s3 | Covered s4 | Covered // state transition coverage results s1->s2 | Not Covered s1->s3 | Covered s2->s1 | Not Covered s2->s4 | Not Covered s3->s1 | Not Covered s3->s4 | Covered s4->s1 | Covered