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EXTERNAL CONSTRAINTS




Constraint blocks can be defined externally in the same file or other files. Defining the constraints in external file, gives some what aspect oriented style of programming.
For example, test_1 requires Var between 0 to 100 and tets_2 requires Var between 50 to 100.Declare the constraint block as empty and define them in other files.



EXAMPLE:
class Base;
rand integer Var;
constraint range;
endclass

program inhe_39;
Base obj;
initial
begin
obj = new();
for(int i=0 ; i < 100 ; i++)
if(obj.randomize())
$display(" Randomization sucsessfull : Var = %0d ",obj.Var);
else
$display("Randomization failed");
end
endprogram

In test_1 file,include
constraint Base::range { Var < 100; Var > 0;}
In test_2 file,include
constraint Base::range { Var < 100; Var > 50;}


Very popular verilog style of including testcases is by using `include which can also be used hear.
Write the constraints in a file and include it.


//
EXAMPLE:
class Base;
rand integer Var;
`include "constraint.sv"
endclass

program inhe_40;
Base obj;
initial
begin
obj = new();
for(int i=0 ; i < 100 ; i++)
if(obj.randomize())
$display(" Randomization sucsessfull : Var = %0d ",obj.Var);
else
$display("Randomization failed");
end
endprogram



Constraint Hiding



In SV Std 1800-2005 LRM , its not mentioned any where that constraints can be declared as local or protected. If they support to declare constraints as local, it would be helpful not to switchoff the constraint block accedentally is it is not supposed to be done. The constraint BNF explicitly excludes the local and protected modifiers. The main reason for their exclusion is because constraints behave like virtual methods that are called by the built-in randomize method. If a constraint were declared local/protected it would still be visible to randomize and participate in the constraint equations. The only limitation would be to call the constraint_mode on local/protected constraints from certain methods, and this does not seem very useful and probably create more confusion with regards to overridden methods.


Index
Constrained Random Verification
Verilog Crv
Systemverilog Crv
Randomizing Objects
Random Variables
Randomization Methods
Checker
Constraint Block
Inline Constraint
Global Constraint
Constraint Mode
External Constraints
Randomization Controlability
Static Constraint
Constraint Expression
Variable Ordering
Constraint Solver Speed
Randcase
Randsequence
Random Stability
Array Randomization
Constraint Guards
Titbits

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