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|---|---|---|---|
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WILDCARD BINS
By default, a value or transition bin definition can specify 4-state values.
When a bin definition includes an X or Z, it indicates that the bin count should only be incremented when the sampled value has an X or Z in the same bit positions.
The wildcard bins definition causes all X, Z, or ? to be treated as wildcards for 0 or 1 (similar to the ==? operator).
For example:
wildcard bins g12_16 = { 4'b11?? };
The count of bin g12_16 is incremented when the sampled variable is between 12 and 16:
1100 1101 1110 1111
program main;
reg [0:3] y;
reg [0:3] values[$]= '{ 4'b1100,4'b1101,4'b1110,4'b1111};
covergroup cg;
cover_point_y : coverpoint y {
wildcard bins g12_15 = { 4'b11?? } ;
}
endgroup
cg cg_inst = new();
initial
foreach(values[i])
begin
y = values[i];
cg_inst.sample();
end
endprogram
Coverage report:
--------------------
VARIABLE : cover_point_y
Expected : 1
Covered : 1
Percent: 100.00
Covered bin
---------------
g12_15
Number of times g12_15 hit : 4
Similarly, transition bins can define wildcard bins.
For example:
wildcard bins T0_3 = (2'b0x => 2'b1x);
The count of transition bin T0_3 is incremented for the following transitions (as if by (0,1=>2,3)):
00 => 10 , 00 => 11, 01 => 10 , 01 => 11
program main;
reg [0:1] y;
reg [0:1] values[$]= '{ 2'b00,2'b01,2'b10,2'b11};
covergroup cg;
cover_point_y : coverpoint y {
wildcard bins trans = (2'b0X => 2'b1X );
}
endgroup
cg cg_inst = new();
initial
foreach(values[i])
begin
y = values[i];
cg_inst.sample();
end
endprogram
Coverage report:
--------------------
VARIABLE : cover_point_y
Expected : 1
Covered : 1
Percent: 100.00
Covered bin
---------------
trans
Number of times trans hit : 1 (01 => 10)
By default, a value or transition bin definition can specify 4-state values.
When a bin definition includes an X or Z, it indicates that the bin count should only be incremented when the sampled value has an X or Z in the same bit positions.
The wildcard bins definition causes all X, Z, or ? to be treated as wildcards for 0 or 1 (similar to the ==? operator).
For example:
wildcard bins g12_16 = { 4'b11?? };
The count of bin g12_16 is incremented when the sampled variable is between 12 and 16:
1100 1101 1110 1111
program main;
reg [0:3] y;
reg [0:3] values[$]= '{ 4'b1100,4'b1101,4'b1110,4'b1111};
covergroup cg;
cover_point_y : coverpoint y {
wildcard bins g12_15 = { 4'b11?? } ;
}
endgroup
cg cg_inst = new();
initial
foreach(values[i])
begin
y = values[i];
cg_inst.sample();
end
endprogram
Coverage report:
--------------------
VARIABLE : cover_point_y
Expected : 1
Covered : 1
Percent: 100.00
Covered bin
---------------
g12_15
Number of times g12_15 hit : 4
Similarly, transition bins can define wildcard bins.
For example:
wildcard bins T0_3 = (2'b0x => 2'b1x);
The count of transition bin T0_3 is incremented for the following transitions (as if by (0,1=>2,3)):
00 => 10 , 00 => 11, 01 => 10 , 01 => 11
program main;
reg [0:1] y;
reg [0:1] values[$]= '{ 2'b00,2'b01,2'b10,2'b11};
covergroup cg;
cover_point_y : coverpoint y {
wildcard bins trans = (2'b0X => 2'b1X );
}
endgroup
cg cg_inst = new();
initial
foreach(values[i])
begin
y = values[i];
cg_inst.sample();
end
endprogram
Coverage report:
--------------------
VARIABLE : cover_point_y
Expected : 1
Covered : 1
Percent: 100.00
Covered bin
---------------
trans
Number of times trans hit : 1 (01 => 10)
Index
Introduction
Cover Group
Sample
Cover Points
Coverpoint Expression
Generic Coverage Groups
Coverage Bins
Explicit Bin Creation
Transition Bins
Wildcard Bins
Ignore Bins
Illegal Bins
Cross Coverage
Coverage Options
Coverage Methods
System Tasks
Cover Property
Report a Bug or Comment on This section - Your input is what keeps Testbench.in improving with time!
Introduction
Cover Group
Sample
Cover Points
Coverpoint Expression
Generic Coverage Groups
Coverage Bins
Explicit Bin Creation
Transition Bins
Wildcard Bins
Ignore Bins
Illegal Bins
Cross Coverage
Coverage Options
Coverage Methods
System Tasks
Cover Property
Report a Bug or Comment on This section - Your input is what keeps Testbench.in improving with time!