Code Browser Pages:
Files in
vmm_eth.tar


call_back.sv
cfg_intf.sv
cfg_xtor.sv
chan.sv
cov.sv
env.sv
file_list
host_driver.sv
host_intf.sv
host_xtor_rx.sv
host_xtor.sv
phy_driver.sv
phy_intf.sv
phy_xtor_rx.sv
phy_xtor.sv
pkt_generator_rx.sv
pkt_generator.sv
pkt.sv
pro.sv
run
rx_pkt.sv
sb.sv
tb_top.v
timescale.v
Current file: top.sv
verilog_top.v 



// by gopi@testbench.in
`timescale 1ns/1ns

module top();

  reg Clk_125M;

  wire        Reset          ;
  reg        Clk_user        ;
  reg        Clk_reg          ;

  wire  [2:0]   Speed       ;
  wire          Rx_mac_ra   ;
  wire           Rx_mac_rd  ;
  wire  [31:0]  Rx_mac_data ;
  wire  [1:0]   Rx_mac_BE   ;
  wire          Rx_mac_pa   ;
  wire          Rx_mac_sop  ;
  wire          Rx_mac_eop  ;
  wire          Tx_mac_wa   ;
  wire           Tx_mac_wr  ;
  wire   [31:0]  Tx_mac_data;
  wire   [1:0]   Tx_mac_BE  ;
  wire           Tx_mac_sop ;
  wire           Tx_mac_eop ;
  wire          Gtx_clk     ;
  wire           Rx_clk     ;
  wire           Tx_clk     ;
  wire          Tx_er       ;
  wire          Tx_en       ;
  wire  [7:0]   Txd         ;
  wire           Rx_er      ;
  wire           Rx_dv      ;
  wire   [7:0]   Rxd        ;
  wire           Crs        ;
  wire           Col        ;
  wire           CSB        ;
  wire           WRB        ;
  wire   [15:0]  CD_in      ;
  wire  [15:0]  CD_out      ;
  wire   [7:0]   CA         ;
  wire           Mdio       ;
  wire          Mdc         ;

  initial
    begin
     Clk_125M = 0;
     forever
     #4 Clk_125M = ~ Clk_125M;
    end

  initial
    forever
     begin
      #4    Clk_user=0;
      #4    Clk_user=1;
     end

  initial
    forever
     begin
     #10    Clk_reg=0;
     #10    Clk_reg=1;
     end

  host_intf h_if(Clk_125M);
  phy_intf  p_if(Clk_125M);
  cfg_intf  c_if(Clk_reg);

  main test(h_if,p_if,c_if);

  MAC_top U_MAC_top(
  .Reset         (h_if.Reset      ),
  .Clk_125M      (Clk_125M        ),
  .Clk_user      (Clk_user        ),
  .Clk_reg       (Clk_reg         ),
  .Speed         (Speed           ),
  .Rx_mac_ra     (h_if.Rx_mac_ra  ),
  .Rx_mac_rd     (h_if.Rx_mac_rd  ),
  .Rx_mac_data   (h_if.Rx_mac_data),
  .Rx_mac_BE     (h_if.Rx_mac_BE  ),
  .Rx_mac_pa     (h_if.Rx_mac_pa  ),
  .Rx_mac_sop    (h_if.Rx_mac_sop ),
  .Rx_mac_eop    (h_if.Rx_mac_eop ),
  .Tx_mac_wa     (h_if.Tx_mac_wa  ),
  .Tx_mac_wr     (h_if.Tx_mac_wr  ),
  .Tx_mac_data   (h_if.Tx_mac_data),
  .Tx_mac_BE     (h_if.Tx_mac_BE  ),
  .Tx_mac_sop    (h_if.Tx_mac_sop ),
  .Tx_mac_eop    (h_if.Tx_mac_eop ),
  .Gtx_clk       (Gtx_clk         ),
  .Rx_clk        (Clk_125M        ),
  .Tx_clk        (Tx_clk          ),
  .Tx_er         (p_if.Tx_er      ),
  .Tx_en         (p_if.Tx_en      ),
  .Txd           (p_if.Txd        ),
  .Rx_er         (p_if.Rx_er      ),
  .Rx_dv         (p_if.Rx_dv      ),
  .Rxd           (p_if.Rxd        ),
  .Crs           (p_if.Crs        ),
  .Col           (p_if.Col        ),
  .CSB           (c_if.CSB        ),
  .WRB           (c_if.WRB        ),
  .CD_in         (c_if.CD_in      ),
  .CD_out        (c_if.CD_out     ),
  .CA            (c_if.CA         ),
  .Mdio          (Mdio            ),
  .Mdc           (Mdc             )
  );




endmodule