The block statements are a means of grouping two or more statements together so that they act syntactically like a single statement. There are two types of blocks in the Verilog HDL:
Sequential block, also called begin-end block
Parallel block, also called fork-join block
The sequential block shall be delimited by the keywords begin and end. The procedural statements in sequential block shall be executed sequentially in the given order.
The parallel block shall be delimited by the keywords fork and join. The procedural statements in parallel block shall be executed concurrently.
Sequential Blocks
A sequential block shall have the following characteristics:
-- Statements shall be executed in sequence, one after another
-- Delay values for each statement shall be treated relative to the simulation time of the execution of the previous statement
-- Control shall pass out of the block after the last statement executes
EXAMPLE: begin areg = breg;
creg = areg; // creg stores the value of breg
end
Parallel Blocks
A parallel block shall have the following characteristics:
-- Statements shall execute concurrently
-- Delay values for each statement shall be considered relative to the simulation time of entering the block
-- Delay control can be used to provide time-ordering for assignments
-- Control shall pass out of the block when the last time-ordered statement executes
EXAMPLE: fork @enable_a
begin #ta wa = 0;
#ta wa = 1;
#ta wa = 0;
end @enable_b
begin #tb wb = 1;
#tb wb = 0;
#tb wb = 1;
end join