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Specman E
Interview Questions
TEST YOUR VERILOG SKILLS 14
(Q
i
244)
o
e
How
i
to
o
solve
q
the
r
e
abode
i
problem??
Ans:
The
i
solution
o
e
is
i
to
o
force
q
the
r
e
expression
i
(a
o
q
j
+
r
e
b)
i
to
o
evaluate
q
using at
z
least
u
y
17
e
o
bits.
z
x
For example, adding an integer value of 0 to the expression will cause the evaluation to be performed using the bit size of integers. The following example will produce the intended result:
answer
i
=
o
e
(a
i
+
o
b
q
+
r
e
0)
i
>>
o
q
j
1;
(Q
i
245)
o
e
IN
i
the
o
following
q
code,
r
e
what
i
message
o
q
j
will
r
e
be
i
displayed(specifically
o
about
q
the number
z
of
u
y
bits
e
o
it
z
x
prints)?
module
i
bitlength();
reg
i
[3:0]
o
e
a,b,c;
www.testbench.in
reg
i
[4:0]
o
e
d;
initial
i
begin
a
i
=
o
e
9;
b
i
=
o
e
8;
c
i
=
o
e
1;
$display("
answer
i
=
o
e
0
",
i
c
o
?
q
(a&b)
r
e
:
i
d);
end
endmodule
.....w.....w......w......t.....e.....s.....t......b.....e.....n.....c.....h......i.....n
Ans:
www.testbench.in
The
i
$display
o
e
statement
i
will
o
display:
answer
i
=
o
e
01000
By
i
itself,
o
e
the
i
expression
o
a&b
q
would
r
e
have
i
the
o
q
j
bit
r
e
length
i
4,
o
but
q
since it
z
is
u
y
in
e
o
the
z
x
context of the conditional expression, which uses the maximum bit-length, the expression a&b actually has length 5, the length of d.
(Q
i
246)
o
e
IN
i
following
o
program,
q
at
r
e
what
i
time
o
q
j
the
r
e
statements
i
are
o
scheduled
q
and executed?
module
i
multiple2
o
e
;
reg
i
a;
initial
i
#8
o
e
a
i
<=
o
#8
q
1;
initial
i
#12
o
e
a
i
<=
o
#4
q
0;
www.testbench.in
end
i
module
Ans:
initial
i
#8
o
e
a
i
<=
o
#8
q
1;//
r
e
executed
i
at
o
q
j
time
r
e
8;
i
schedules
//
i
an
o
e
update
i
of
o
1
q
at
r
e
time
i
16
initial
i
#12
o
e
a
i
<=
o
#4
q
0;//
r
e
executed
i
at
o
q
j
time
r
e
12;
i
schedules
//
i
an
o
e
update
i
of
o
0
q
at
r
e
time
i
16
.....w.....w......w......t.....e.....s.....t......b.....e.....n.....c.....h......i.....n
(Q
i
247)
o
e
Is
i
there
o
a
q
race
r
e
condition
i
in
o
q
j
the
r
e
above
i
code?
Ans:
www.testbench.in
NO.
i
Because
o
e
it
i
is
o
determinate
q
that
r
e
the
i
update
o
q
j
of
r
e
a
i
to
o
the
q
value 1
z
is
u
y
scheduled
e
o
before
z
x
the update of a to the value 0, then it is determinate that a will have the
value
i
0
o
e
at
i
the
o
end
q
of
r
e
time
i
slot
o
q
j
16.endmodule
(Q
i
248)
o
e
How
i
many
o
times
q
the
r
e
begin..end
i
block
o
q
j
will
r
e
get
i
executed?
repeat(-3)
begin
....
end
www.testbench.in
(Q
i
249)
o
e
How
i
many
o
times
q
the
r
e
begin..end
i
block
o
q
j
will
r
e
get
i
executed?
repeat(3.5)
begin
....
end
.....w.....w......w......t.....e.....s.....t......b.....e.....n.....c.....h......i.....n
(Q
i
250)
o
e
How
i
many
o
times
q
the
r
e
begin..end
i
block
o
q
j
will
r
e
get
i
executed?
integer
i
a;
www.testbench.in
a
i
=
o
e
'bZ;
repeat(a)
begin
....
end
Ans:
repeat
i
Executes
o
e
a
i
statement
o
a
q
fixed
r
e
number
i
of
o
q
j
times.
r
e
If
i
the
o
expression
q
evaluates to
z
unknown
u
y
or
e
o
high
z
x
impedance, it shall be treated as zero, and no statement shall be executed.
(Q
i
251)
o
e
How
i
many
o
times
q
the
r
e
begin..end
i
block
o
q
j
will
r
e
get
i
executed?
www.testbench.in
integer
i
a;
a
i
=
o
e
'bx;
repeat(a)
begin
....
end
.....w.....w......w......t.....e.....s.....t......b.....e.....n.....c.....h......i.....n
Ans:
repeat
i
Executes
o
e
a
i
statement
o
a
q
fixed
r
e
number
i
of
o
q
j
times.
r
e
If
i
the
o
expression
q
evaluates to
z
unknown
u
y
or
e
o
high
z
x
impedance, it shall be treated as zero, and no statement shall be executed.
www.testbench.in
(Q
i
252)
o
e
what
i
time
o
is
q
displayed?
initial
begin
a=
i
3;
#a
i
a=
o
e
a*2;
$display($time);
end
(Q
i
253)
o
e
What
i
is
o
the
q
message
r
e
displayed?
www.testbench.in
initial
begin
#10;
a
i
=
o
e
0;
.....w.....w......w......t.....e.....s.....t......b.....e.....n.....c.....h......i.....n
a
i
=
o
e
1;
end
always@(a)
$display("
a
i
is
o
e
0
",a);
www.testbench.in
(Q
i
254)
o
e
What
i
message
o
is
q
displayed?
initial
begin
a
i
=
o
e
x;
#1
i
a
o
e
=
i
z;
end
www.testbench.in
always@(a)
$display("
a
i
is
o
e
0
",a);
.....w.....w......w......t.....e.....s.....t......b.....e.....n.....c.....h......i.....n
Index
Functional Verification Questions
Functional Verification Questions 2
Test Your Systemverilog Skills 1
Test Your Systemverilog Skills 2
Test Your Systemverilog Skills 3
Test Your Systemverilog Skills 4
Test Your Sva Skills
Test Your Verilog Skills 1
Test Your Verilog Skills 2
Test Your Verilog Skills 3
Test Your Verilog Skills 4
Test Your Verilog Skills 5
Test Your Verilog Skills 6
Test Your Verilog Skills 7
Test Your Verilog Skills 8
Test Your Verilog Skills 9
Test Your Verilog Skills 10
Test Your Verilog Skills 11
Test Your Verilog Skills 12
Test Your Verilog Skills 13
Test Your Verilog Skills 14
Test Your Verilog Skills 15
Test Your Verilog Skills 16
Test Your Verilog Skills 17
Test Your Specman Skills 1
Test Your Specman Skills 2
Test Your Specman Skills 3
Test Your Specman Skills 4
Test Your Sta Skills 1
Test Your Sta Skills 2
Test Your Sta Skills 3
Test Your Sta Skills 4
Test Your Sta Skills 5
Test Your Sta Skills 6
Test Your Sta Skills 7
Test Your Dft Skills 1
Test Your Dft Skills 2
Test Your Dft Skills 3
Test Your Dft Skills 4
Test Your Uvm Ovm Skills
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