In the previous example, signal clk is declared as port to the interface. Interface Ports work similar to the module ports. Members of port list can be connected externally by name or position when the interface is instantiated as shown in line 3 of module top code.
In the above example, we did not mention the direction of signals. The direction of the clk signal in input for both the Dut and Testbench modules. But for the rest of the signals, the direction is not same. To specify the direction of the signal w.r.t module which uses interface instead of port list, modports are used. Modport restrict interface access within a module based on the direction declared. Directions of signals are specified as seen from the module. In the modeport list, only signal names are used.
Let us see the modport usage with the previous example. 2 mod port definitions are needed, one for DUT and other for TestBench.
In this example, the modport name selects the appropriate directional information for the interface signals accessed in the module header. Modport selection can be done in two ways. One at Module declaration , other at instantication.
Modport Selection Duing Module Definition.
module Dut (intf.dut dut_if); // declaring the interface with modport
assign dut_if.data = temp1 ? temp2 : temp3 ; // using the signal in interface
always @(posedge intf.clk)