|HOME |ABOUT |ARTICLES |ACK |FEEDBACK |TOC |LINKS |BLOG |JOBS |


Tutorials



PROPERTIES




A property defines a behavior of the design. A property can be used for verification as an assumption, a checker, or a coverage specification.
Sequences are often used to construct properties. usage of sequences in properties brakes down the complexity. Sequence can be reused across various properties.

A property can be declared in any of the following:
A module
An interface
A program
A clocking block
A package
A compilation-unit scope


Properties constructs:
Disable iff
Implication (if ..else)
overlapping implication (|->)
Non overlapping implication(||->)
not




EXAMPLE:
property rule6_with_type(bit x, bit y);
##1 x |-> ##[2:10] y;
//antecedent |-> consequent
endproperty



The left-hand operand sequence_expr is called the antecedent, while the right-hand operand property_expr is called the consequent.

if antecedent is false, then consequent is not cared and property is considered as vacuous success.
if antecedent is True and if consequent is false then property is considered as false.
if antecedent is True and if consequent is true then property is considered as true.





Overlap Implication:



Consequent expression is evaluated on the same clock of antecedent.



EXAMPLE:
a |-> b









Non Overlapping Implication



Consequent expression is evaluated on the next clock of antecedent



EXAMPLE:
a ||-> b








Index
Introduction
Event Simulation
Assertion Types
Assertion System Tasks
Concurrent Assertion Layers
Sequences
Properties
Verification Directive

Report a Bug or Comment on This section - Your input is what keeps Testbench.in improving with time!





<< PREVIOUS PAGE

TOP

NEXT PAGE >>

copyright 2007-2017 :: all rights reserved www.testbench.in::Disclaimer